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Malicious Fault-Immune Cryptographic Hardware Implementation

Researcher: Diana Marculescu

Cross Cutting Thrusts: Cryptography

Abstract

Cryptographic hardware is a central part of several fields involving information security and related issues such as authentication and access control. Cryptography is essential in the techniques used in computer and network security for access control and information confidentiality. Many of the tasks needed for cryptograph algorithms (such as AES - Advanced Encryption Standard) are frequently implemented directly in hardware, in effect providing co-processing or hardware acceleration capabilities. With the advances in current technology, efficient implementation of cryptographic hardware is possible. However, with the aggressive technology scaling, reliable operation of digital circuits becomes a challenging proposition.

In our work, we propose a methodology that includes symbolic modeling and efficient estimation of the susceptibility of a sequential system to soft errors caused by malicious fault injection that can be applied to find the part of the system that has the highest soft error impact, that is the part of the system that contributes the most to the soft error rate. We use this information for selectively hardening the system with a reasonable cost overhead.

Once the soft error impact of individual parts of the system is known, one can determine sensitive areas of the chip and therefore apply specific hardening techniques. We will address this through several directions:

Hardening by Gate Resizing: We determine the mean error impact (MEI) of a gate by averaging its error impact across all outputs and all probability distributions. All gates with MEI larger than a given threshold are resized, such that the outputs of those gates are not affected when targeted by malicious faults.

Hardening by Redundancy Addition and Removal: We use redundancy addition and remove guided by MEI and mean masking impact (MMI) to determine what redundant gates can be added or removed that are likely to decrease susceptibility to malicious faults.

Hardening by State Encoding: We propose to develop special encoding techniques that can allow easier fault detection and recovery. One-hot state-encoding is such an example, but the cost is prohibitive. We plan to explore information-theoretic techniques for determining the best state encoding for maximum fault detection and recovery.