Skip to main content

Seminar:  Building Secure Reliable Hardware Roots-of-Trust: Are PUFs Enough?

Date:April 6, 2015 
Talk Title:Building Secure Reliable Hardware Roots-of-Trust: Are PUFs Enough?
Speaker:Ken Mai
Time & Location:12:00pm - 1:00pm
Panther Hollow Room, CIC Building, Pittsburgh


Hardware roots-of-trust are often regarded as the bedrock upon which the rest of the system securities lies. They perform basic security critical functions such as cryptographic key storage/generation, hardware and software authentication, secure data storage, and data encryption/hashing. Further, these blocks must be resistant to various forms of non-invasive and invasive attacks and tampering. We will examine the necessary features and characteristics of hardware roots-of-trust and if current technologies can meet those needs. Specifically, we will focus on the design and implementation of physical unclonable functions (PUFs) and whether they are suitable for hardware roots-of-trust. 

Speaker Bio

Ken Mai is a Senior Systems Scientist in Electrical and Computer Engineering.

His research interests are with process technologies scaling into the nanometer regime, the underlying implementation technology increasingly affects architecture and circuit design. We must adapt and reinvent current designs to circumvent technology constraints (e.g. interconnect delay, device leakage, soft-errors, device mismatch) and to target emerging applications (e.g. sensor networks, computational biology). The key near-term challenge is to build computer systems that can efficiently achieve high-performance, yet remain economically feasible, general-purpose, and easy to program. In the long-term, with CMOS scaling approaching fundamental limits, the challenge will be to build efficient, high-performance, reliable computation systems from technology building blocks that may be radically different from those we use today.

His primary research interest is the circuit design of efficient, high-performance digital blocks (i.e. memories and functional units) in future generation technologies. Further,his interests lie in building tools to export VLSI-level design information and constraints to architectural-level design.