Mobility, Next Generation Secure and Available Networks
Radu Marculescu received his Ph.D. from the University of Southern California (Los Angeles) in 1998. In 2000 he joined the Electrical and Computer Engineering faculty of Carnegie Mellon University, where he is now a Professor. His research interests include system-level design methodologies with emphasis on analysis and synthesis of low-power VLSI systems, performance analysis of embedded systems, and fault-tolerant communication. He teaches undergraduate courses in VLSI and graduate courses in system-level design methodologies.
He and his research group performs research on formal methods for SOC design of embedded applications. Of particular interest are fast methods for power and performance analysis that can guide the design process of portable information devices. Currently, the group develops probabilistic models for exploiting concurrency and communication aspects in the design and optimization of complex heterogeneous applications.
Radu was awarded the National Science Foundation's Career Award for the "System-Level Power/Performance Analysis for Embedded Systems Design" in 2000. He has recently received three best paper awards in the area of systems design methodologies at the 2001 and 2003 editions of the Design and Test Conference in Europe (DATE), and 2003 edition of the Asia & South Pacific Design Automation Conference (ASP-DAC). He was also awarded the 2002 Ladd Research Award from Carnegie Institute of Technology.
Research Area: Mobility | Next Generation Secure and Available Networks
Researcher: Radu MarculescuResearcher: Radu MarculescuResearcher: Radu Marculescu
"SLIC: Statistical Learning in Chip". R. D. Blanton, X. Li, K. W. Mai, D. Marculescu, R. Marculescu, J. Paramesh, J. Schneider, and D. E. Thomas, ISIC: International Symposium on Integrated Circuits, 2014.
"Energy-Efficient VFI-Partitioned Multicore Design Using Wireless NoC Architectures". R. Kim, G. Liu, P. Wettin, R. Marculescu, D. Marculescu, and P. P. Panda, CASES: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, 2014.
"Low-Latency Wireless 3D NoCs Via Randomized Shortcut Chips". H. Matsutani, M. Koibuchi, I. Fujiwara, T. Kagami, Y. Take, T. Kuroda, P. Bogdon, R. Marculescu, and H. Amano, DATE: Design Automation and Test in Europe, 2014.
"An efficient Network-on-Chip (NoC) based multicore platform for hierarchical parallel genetic algorithms". Y. Xue, Z. Qian, G. Wei, P. Bogdan, C.-Y. Tsui, and R. Marculescu, NOCS: The ACM/IEEE International Symposium on Networks-on-Chip, vol. 2014, pp. 17-24, 2014.
"ASH: Scalable Mining of Collective Behaviors in Social Media using Riemannian Geometry". H.-K. Peng and R. Marculescu, ASE BIGDATA/SOCIALCOM/CYBERSECURITY Conference, vol. 2014, pp. 10, 2014.
"Don't Let History Repeat Itself: Optimal Multidrug Quorum Quenching of Pathogens Network". G. Wei and R. Marculescu, First ACM International Conference on Nanoscale Computing and Communication, pp. 9, 2014.
"A Comprehensive and Accurate Latency Model for Network-on-Chip Performance Analysis". Z. Qian, D.-C. Juan, P. Bogdan, C.-Y. Tsui, D. Marculescu, and R. Marculescu, ASPDAC: IEEE/ACM Asian-South Pacific Design Automation Conference, 2014.
"A Comprehensive and Accurate Latency Model for Network-on-Chip Performance Analysis".
Qian, Z., Juan, D.-C., Bogdan, P., Tsui, C.-Y., Marculescu, D., & Marculescu, R. (2014). ASPDAC: IEEE/ACM Asian-South Pacific Design Automation Conference.
" Dynamic power management for multidomain system-on-chip platforms: An optimal control approach".
Bogdon, P., Marculescu, R., & Jain, S. (2013). ACM Transactions on Design Automation of Electronic Systems, 18(4).
"Performance Evaluation of Multicore Systems: From Traffic Analysis to Latency Predictions (Embedded Tutorial)".
Qian, Z., Bogdon, P., Tsui, C.-Y., & Marculescu, R. (2013). ICCAD: Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 82-84.